National Tsing Hua University, Taiwan, China

Biography: Meng-Fan Chang (M'05-SM'14) received the M.S. degree from The Pennsylvania State University, US, and the Ph.D. degree from the National Chiao Tung University, Hisnchu, Taiwan, respectively. Currently, he is a Full Professor at National Tsing Hua University (NTHU), Taiwan. Before 2006, he has worked in industry over 10 years.

From 1996 to 1997, he designed memory compilers in Mentor Graphics, New Jersey, US. From 1997 to 2001, he designed embedded SRAMs and Flash in Design Service Division (DSD) at TSMC, Hsinchu, Taiwan. During 2001-2006, he was a co-founder and a Director in IPLib Company, Taiwan, where he developed embedded SRAM and ROM compilers, Flash macros, and Flat-cell ROM products. His research interests include circuit designs for volatile and nonvolatile memory, ultra-low-voltage systems, 3D-memory, circuit-device interactions, spintronics circuits, memristor logics for neuromorphic computing, and computing-in-memory for Artificial Intelligence.

Dr. Chang is the corresponding author of numerous ISSCC, Symp. VLSI Circuits, IEDM, and DAC papers. He is an associate editor for IEEE TVLSI, and IEEE TCAD. He has been serving on technical program committees for ISSCC, IEDM, DAC, ISCAS, A-SSCC, VLSI-DAT, and numerous international conferences. He has been a Distinguished Lecture (DL) speaker for IEEE Circuits and Systems Society (CASS), technical committee member of CASS, and the administrative committee (AdCom) member of IEEE Nanotechnology Council. He has also been serving as the Program Director of Micro-Electronics Program of MOST-Taiwan during 2018-2020, Associate Executive Director for Taiwan's National Program of Intelligent Electronics (NPIE) and NPIE bridge program of Taiwan during 2011-2018. He received Outstanding Electrical Engineering Professor of Chinese Electrical Association in 2017, the Academia Sinica (Taiwan) Junior Research Investigators Award in 2012, the Ta-You Wu Memorial Award of National Science Council (NSC-Taiwan) in 2011. He also received numerous awards from Taiwan's National Chip Implementation Center (CIC), NTHU, MXIC Golden Silicon Awards, and ITRI.

Speech Title: Challenges in Memory Enabled Intelligent IoT and AI Edge Devices: Nonvolatile Logics and Computing-in-Memory

Abstract: Memory has become one of the bottlenecks in the development of intelligent edge devices with high bandwidth and low energy consumption. This invited talk will explore the challenges faced by researchers in the circuit designs, circuit-device-interaction, and architecture-circuit interactions for emerging memory, including embedded SRAM, resistive RAM (ReRAM), STT-MRAM, and phase-change memory (PCM). The 2nd part of this talk will explore the implementation of memory beyond conventional memory applications, such as nonvolatile-logics (nvLogics), nonvolatile processors, and computing-in-memory for IoT and artificial intelligent (AI) chips.