Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, China

Biography: Haiou Li is a Professor of Guilin University of Electronic Technology in China. In 2006, he received the Ph.D. degree from Institute of Microelectronics of Chinese Academy of Sciences. He was a postdoctoral researcher at Department of Electronic and Computer Engineering from The Hong Kong University of Science and Technology (HKUST), HK, China from 2006 to 2010. In 2010 and 2011, he joined Guilin University of Electronic Technology as a Professor. He is currently the associate dean of the School of Information and Communication at Guilin University of Electronic Technology. He mainly engaged in the fabrication of microwave devices, wide bandgap power devices, integrated circuit design and 2D electronic devices.

Speech Title: Interface properties of buried InGaAs channel MOSFET with InP barrier layer

Abstract: The impact of nitridation and sulfur passivation treatment on Al₂O₃/InP and Al₂O₃/InGaAs MOS capacitors were investigated by comparing the characteristics of frequency dispersion, hysteresis, the Dit and ΔNbt values, analyzing the interface traps and the leakage current. Compared with the Al₂O₃/InGaAs MOS capacitor, Al₂O₃/InP MOS capacitor has more advantage of high interfacial quality. For Al₂O₃/InP MOS capacitor, the sulfur passivation treatment can effectively reduce fast interface states, achieved a minimum Dit value of 2.6×1011 cm^-2eV^-1 near the midgap. N₂ plasma treatment can effectively suppress the formation of surface native oxide, reduced the border traps density from 9´1011 v^-1cm^-2 to 5.85´1011 v^-1cm^-2 and the leakage current from 9´10^-5A/cm² to 2.5´10^-7A/cm². The nitridation and sulfur passivation treatment are applied in buried InGaAs channel MOSFET with InP barrier layer to improve interface quality of device. In order to reduce equivalent oxide thickness for InGaAs channel MOSFET, decreasing the Al₂O₃ thickness is not feasible under 3 nm especially. The laminate gate dielectrics of 0.8 nm-Al₂O₃/3 nm-HfO₂, 0.8 nm-Al₂O₃/3.5 nm-HfO₂ and 0.8 nm-Al₂O₃/3 nm-HfO₂/0.5 nm-Al₂O₃ have been investigated performing in frequency dispersion, hysteresis, border traps, interface state density and gate leakage current. The laminate gate structure of Al₂O₃/HfO₂/Al₂O₃ is better than other gate structures in hysteresis, the Dit, ΔNbt and the leakage current. The 100 nm gate-length buried InGaAs channel MOSFET with 0.8 nm-Al₂O₃/3 nm-HfO₂/0.5 nm-Al₂O₃ gate dielectric layer exhibits a 1.3 nm EOT, which are respectively increased by 41% the peak transconductance and 38% the drive current density compared to that of the 3 nm-Al₂O₃ layered one.

Keywords: Al₂O₃/InP interface, sulfur passivation, N₂ plasma treatment, buried InGaAs MOSFET, InP barrier layer.